Browsing by author "Badaroglu, Mustafa"
Now showing items 1-20 of 67
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3D IC architectures
Badaroglu, Mustafa (2011) -
3D integration technology basics and its impact on design
Badaroglu, Mustafa; Marchal, Pol (2010) -
3D system integration
Badaroglu, Mustafa (2011) -
3D technology roadmap and status
Marchal, Pol; Van der Plas, Geert; Eneman, Geert; Moroz, V.; Badaroglu, Mustafa; Mercha, Abdelkarim; Thijs, Steven; Linten, Dimitri; Katti, Guruprasad; Stucchi, Michele; Vandevelde, Bart; Oprins, Herman; Cherman, Vladimir; Croes, Kris; Redolfi, Augusto; La Manna, Antonio; Travaly, Youssef; Beyne, Eric; Cartuyvels, Rudi (2011) -
A CMOS ultra-wideband receiver for low data-rate communication
Ryckaert, Julien; Verhelst, M.; Badaroglu, Mustafa; D'Amico, S.; De Heyn, Vincent; Desset, Claude; Nuzzo, Pierluigi; Van Poucke, Bart; Wambacq, Piet; Baschirotto, A.; Dehaene, Wim; Van der Plas, Geert (2007) -
A digital 80Mb/s OFDM transceiver IC for wireless LAN in 5GHz band
Eberle, Wolfgang; Badaroglu, Mustafa; Derudder, Veerle; Thoen, Steven; Vandenameele, Patrick; Van der Perre, Liesbet; Vergara, Mario; Gyselinckx, Bert (2000) -
A flexible OFDM transceiver ASIC for high-speed wireless local networks
Eberle, Wolfgang; Badaroglu, Mustafa; Derudder, Veerle; Van der Perre, Liesbet; Vergara, Mario; Gyselinckx, Bert; Engels, Marc; Bolsens, Ivo; De Man, Hugo (2000) -
BANDIT: Embedding analog-to-digital converters on digital telecom ASICs
Donnay, Stephane; Van Heijningen, Marc; Badaroglu, Mustafa; Diels, Wim; Engels, Marc; Bolsens, Ivo; Zinzius, Y.; Gielen, Georges; Sansen, Willy; Fondén, T.; Signell, S. (1999) -
Carrier-based UWB impulse radio: simplicity, flexibility, and pulser implementation in 180 nm CMOS
Ryckaert, Julien; Badaroglu, Mustafa; Desset, Claude; De Heyn, Vincent; Van der Plas, Geert; Wambacq, Piet; Van Poucke, Bart; Donnay, Stephane (2005-09) -
Circuit and product level assessment of emerging fully depleted channel devices: FinFET and UTBOX-SOI
Badaroglu, Mustafa; Dehan, Morin; Garcia Bardon, Marie; Miranda Corbalan, Miguel; Zuber, Paul; Schuddinck, Pieter; Mallik, Arindam; Mercha, Abdelkarim; Verkest, Diederik (2012) -
Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients
Badaroglu, Mustafa; Tiri, Kris; Donnay, Stephane; Wambacq, Piet; Verbauwhede, Ingrid; Gielen, Georges; De Man, Hugo (2002) -
CMOS-based single-package solutions for wireless communications
Wambacq, Piet; Linten, Dimitri; Soens, Charlotte; Badaroglu, Mustafa; Ryckaert, Julien; Van der Plas, Geert; Carchon, Geert; Mercha, Abdelkarim; Donnay, Stephane (2005) -
CVD based selective Co deposition on Cu and W for via pre-fill
Chen, Phil; Zheng, Jun-Fei; Lieten, Ruben; Frye, Asa; Baum, Thomas; O'Neill, James; van der Veen, Marleen; Murdoch, Gayle; Boemmels, Juergen; Tokei, Zsolt; Xu, Jeff; Zhu, John; Bao, Jerry; Badaroglu, Mustafa; Yeap, Geoffrey (2016) -
Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate
Badaroglu, Mustafa; Balasubramanian, Lakshmanan; Tiri, Kris; Gravot, Vincent; Wambacq, Piet; Van der Plas, Geert; Donnay, Stephane; Gielen, Georges; De Man, Hugo (2003-09) -
Digital circuit capacitance and switching analysis for ground bounce in ICs with a high-ohmic substrate
Badaroglu, Mustafa; Van der Plas, Geert; Wambacq, Piet; Balasubramanian, Lakshmanan; Tiri, Kris; Verbauwhede, Ingrid; Donnay, Stephane; De Man, Hugo; Gielen, Georges (2004-07) -
Digital circuit design and benchmarking for FDSOI devices: FinFET and UTBOX
Badaroglu, Mustafa; Zuber, Paul; Garcia Bardon, Marie; Miranda Corbalan, Miguel; Schuddinck, Pieter; Mercha, Abdelkarim (2012) -
Digital ground bounce reduction by phase modulation of the clock
Badaroglu, Mustafa; Wambacq, Piet; Van der Plas, Geert; Donnay, Stephane; Gielen, Georges; De Man, Hugo (2004-02) -
Digital ground bounce reduction by supply current shaping and clock frequency modulation
Badaroglu, Mustafa; Wambacq, Piet; Van der Plas, Geert; Donnay, Stephane; Gielen, Georges; De Man, Hugo (2005) -
Efficient and accurate simulation of substrate noise generation by large digital circuits
Van Heijningen, Marc; Badaroglu, Mustafa; Donnay, Stephane (2001) -
Extreme scaling enabled by 5 tracks cells : holistic design-device co-optimization for FinFETs and lateral nanowires
Garcia Bardon, Marie; Sherazi, Yasser; Schuddinck, Pieter; Jang, Doyoung; Yakimets, Dmitry; Debacker, Peter; Baert, Rogier; Mertens, Hans; Badaroglu, Mustafa; Mocuta, Anda; Horiguchi, Naoto; Mocuta, Dan; Raghavan, Praveen; Ryckaert, Julien; Verkest, Diederik; Steegen, An (2016)