Browsing by author "Ji, Yunhyuck"
Now showing items 1-5 of 5
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CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits
Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O'Sullivan, Barry; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto (2018) -
CMOS integration of thermally stable diffusion and gate replacement (D&GR) high-k/metal gate stacks in DRAM periphery transistors
Dentoni Litta, Eugenio; Ritzenthaler, Romain; Schram, Tom; Spessot, Alessio; O'Sullivan, Barry; Ji, Yunhyuck; Mannaert, Geert; Lorant, Christophe; Sebaai, Farid; Thiam, Arame; Ercken, Monique; Demuynck, Steven; Horiguchi, Naoto (2017) -
Improving the low-frequency noise performance of input/output DRAM peripheral pMOSFETs
Simoen, Eddy; O'Sullivan, Barry; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Schram, Tom; Fazan, Pierre; Ji, Yunhyuck; Linten, Dimitri; Horiguchi, Naoto (2017) -
Overview of bias temperature instability in scaled DRAM logic for memory transistors
O'Sullivan, Barry; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Simoen, Eddy; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Cheolygu, Kim; Spessot, Alessio; Linten, Dimitri; Horiguchi, Naoto (2020) -
Reliability engineering enabling continued logic for memory device scaling
O'Sullivan, Barry; Ritzenthaler, Romain; Dentoni Litta, Eugenio; Simoen, Eddy; Machkaoutsan, Vladimir; Fazan, Pierre; Ji, Yunhyuck; Kim, Cheolgyu; Spessot, Alessio; Linten, Dimitri; Horiguchi, Naoto (2019)