Browsing by author "Hayakawa, Susumu"
Now showing items 1-3 of 3
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Demonstration of integrating post-thinning clean and TSV exposure recess etch into a wafer backside thinning process
Zhao, Ming; Hayakawa, Susumu; Nishida, Yoshiteru; Jourdain, Anne; Tabuchi, Tomotaka; Leunissen, Peter (2012) -
Demonstration of ultra-thin Si grinding process controlled by in-situ non-contact gauge for 3D stacked IC (3D-SIC)
Zhao, Ming; Verbinnen, Greet; Yoshida, Shinji; Hayakawa, Susumu; Tabuchi, Tomotaka; Jourdain, Anne; Beyne, Eric; Swinnen, Bart; Leunissen, Peter (2010) -
Wafer backside thinning process integrated with post-thinning clean and TSV exposure recess etch
Zhao, Ming; Hayakawa, Susumu; Nishida, Yoshiteru; Jourdain, Anne; Tabuchi, Tomotaka; Leunissen, Peter (2012)