Browsing by author "Pan, Chenyun"

Accurate determination of interlayer resistivity of 2-D layered systems: graphene case study

Nashed, Ramy; Pan, Chenyun; Wu, Xiangyu; Asselberghs, Inge; Tokei, Zsolt; Catthoor, Francky; Naeemi, Azad (2020)

Beyond-Cu Intermediate-Length Interconnect Exploration for SRAM Application

Pei, Zhenlin; Catthoor, Francky; Tokei, Zsolt; Pan, Chenyun (2022)

CFET SRAM With Double-Sided Interconnect Design and DTCO Benchmark

Liu, Hsiao-Hsuan; Schuddinck, Pieter; Pei, Zhenlin; Verschueren, Lynn; Mertens, Hans; Salahuddin, Shairfe Muhammad; Hiblot, Gaspard; Xiang, Yang; Chan, Boon Teik; Subramanian, Sujith; Weckx, Pieter; Hellings, Geert; Garcia Bardon, Marie; Ryckaert, Julien; Pan, Chenyun; Catthoor, Francky (2023)

Emerging Interconnect Exploration for SRAM Application Using Nonconventional H-Tree and Center-Pin Access

Pei, Zhenlin; Mayahinia, Mahta; Liu, Hsiao-Hsuan; Tahoori, Mehdi; Salahuddin, Shairfe Muhammad; Catthoor, Francky; Tokei, Zsolt; Pan, Chenyun (2023)

Graphene-Based Interconnect Exploration for Large SRAM Caches for Ultrascaled Technology Nodes

Pei, Zhenlin; Mayahinia, Mahta; Liu, Hsiao-Hsuan; Tahoori, Mehdi; Catthoor, Francky; Tokei, Zsolt; Pan, Chenyun (2023-01-01)

Technology/circuit co-optimization and benchmarking for graphene interconnects at sub-10nm technology node

Pan, Chenyun; Raghavan, Praveen; Tokei, Zsolt; Catthoor, Francky; Naemi, Azad (2015)

Technology/circuit/system co-optimization and benchmarking for multilayer graphene interconnects at sub-10-nm technology node

Pan, Chenyun; Raghavan, Praveen; Ceyhan, Ahmet; Catthoor, Francky; Tokei, Zsolt; Naeemi, Azad (2015)