Browsing by author "Eneman, Geert"
Now showing items 21-40 of 334
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Analysis of the temperature dependence of trap-assisted tunneling in Ge pFET junctions
Bargallo Gonzalez, Mireia; Eneman, Geert; Wang, Gang; De Jaeger, Brice; Simoen, Eddy; Claeys, Cor (2011) -
Analysis of the temperature dependence of trap-assisted-tunneling in Ge pFETs junctions
Bargallo Gonzalez, Mireia; Eneman, Geert; Wang, Gang; De Jaeger, Brice; Simoen, Eddy; Claeys, Cor (2011) -
Analysis of then substrate current in Ge pMOSFETs
Todi, V.; Simoen, Eddy; Eneman, Geert; Claeys, Cor; Sundaram, K.B. (2009) -
Analytical model and Monte Carlo simulations for phosphorus implantation in germanium including ion channeling
Hellings, Geert; Eneman, Geert; Meuris, Marc; De Meyer, Kristin (2008) -
Anisotropic stress in narrow sGe fin field-effect transistor channels measured using nano-focused Raman spectroscopy
Nuytten, Thomas; Bogdanowicz, Janusz; Witters, Liesbeth; Eneman, Geert; Hantschel, Thomas; Schulze, Andreas; Favia, Paola; Bender, Hugo; De Wolf, Ingrid; Vandervorst, Wilfried (2018) -
Application of selective epitaxial growth for merging fins in source/drain areas of sub 20 nm FinFET transistors
Hikavyy, Andriy; Kubicek, Stefan; Chew, Soon Aik; Boccardi, Guillaume; Favia, Paola; Eneman, Geert; Loo, Roger (2013) -
Application of selective epitaxial growth in the sub 20 nm FinFET device fabrication
Hikavyy, Andriy; Rosseel, Erik; Eneman, Geert; Favia, Paola; Loo, Roger (2014) -
Are extended defects a show stopper for future III-V CMOS technologies?
Claeys, Cor; Hsu, Brent; He, Liang; Mols, Yves; Kunert, Bernardette; Langer, Robert; Waldron, Niamh; Eneman, Geert; Collaert, Nadine; Heyns, Marc; Simoen, Eddy (2018-06) -
Assessment of Ge1-xSnx alloys for strained Ge CMOS devices
Takeuchi, S.; Shimura, Y.; Nishimura, T.; Vincent, Benjamin; Eneman, Geert; Clarysse, Trudo; Demeulemeester, J.; Temst, K.; Vantomme, Andre; Dekoster, Johan; Caymax, Matty; Loo, Roger; Nakatsuka, O.; Sakai, A.; Zaima, S. (2010) -
Assessment of Ge1-xSnx alloys for strained Ge CMOS devices
Takeuchi, Shotaro; Shimura, Yosuke; Nishimura, Tsuyoshi; Vincent, Benjamin; Eneman, Geert; Clarysse, Trudo; Demeulemeester, Jelle; Temst, Kristiaan; Vantomme, Andre; Dekoster, Johan; Caymax, Matty; Loo, Roger; Nakatsuka, Osamu; Sakai, A.; Zaima, Shigeaki (2010-10) -
Assessment of SiGe quantum well transistors for DRAM peripheral applications
Ritzenthaler, Romain; Schram, Tom; Eneman, Geert; Mocuta, Anda; Horiguchi, Naoto; Thean, Aaron; Spessot, Alessio; Aoulaiche, Marc; Fazan, Pierre; Noh, Kyung Bong; Son, Yunik (2015) -
Atomic layer deposition as an enabling technology for fabrication of germanium MOS transistor
Eneman, Geert; Delabie, Annelies; Van Elshocht, Sven; De Jaeger, Brice; Nicholas, Gareth; Martens, Koen; Brunco, David; Zimmerman, Paul; Houssa, Michel; Pourtois, Geoffrey; Kaczer, Ben; Leys, Frederik; Winderickx, Gillis; Huyghebaert, Cedric; Terzieva, Valentina; Loo, Roger; Caymax, Matty; Meuris, Marc; Heyns, Marc (2007) -
Band offsets in biaxially stressed SiGe layers for arbitrary orientations
Eneman, Geert; Roussel, Philippe; Brunco, David; Collaert, Nadine; Mocuta, Anda; Thean, Aaron (2016) -
Band-to-band tunneling off-state leakage in Ge fins and nanowires: effect of quantum confinement
Eneman, Geert; Verhulst, Anne; Smith, Lee; Moroz, Victor; De Keersgieter, An; Mocuta, Anda; Collaert, Nadine; Thean, Aaron (2016) -
Bandlike and localized states of extended defects in n-type In0.53Ga0.47As
Hsu, Brent; Simoen, Eddy; Merckling, Clement; Eneman, Geert; Mols, Yves; Alian, AliReza; Langer, Robert; Collaert, Nadine; Heyns, Marc (2018) -
Beyond-Si materials and devices for more Moore and more than Moore applications
Collaert, Nadine; Alian, AliReza; Arimura, Hiroaki; Boccardi, Guillaume; Eneman, Geert; Franco, Jacopo; Ivanov, Tsvetan; Lin, Dennis; Mitard, Jerome; Ramesh, Siva; Rooyackers, Rita; Schaekers, Marc; Sibaja-Hernandez, Arturo; Sioncke, Sonja; Smets, Quentin; Vais, Abhitosh; Vandooren, Anne; Veloso, Anabela; Verhulst, Anne; Verreck, Devin; Waldron, Niamh; Walke, Amey; Witters, Liesbeth; Yu, Hao; Zhou, Daisy; Thean, Aaron (2016) -
Challenges and opportunities for vertical nanowire FETs: device design and fabrication
Veloso, Anabela; Matagne, Philippe; Huynh Bao, Trong; Eneman, Geert; Loo, Roger; Wostyn, Kurt; Brus, Stephan; Boemmels, Juergen; Mocuta, Dan; Ryckaert, Julien (2018) -
Challenges and opportunities in advanced Ge pMOSFETs
Simoen, Eddy; Mitard, Jerome; Hellings, Geert; Eneman, Geert; De Jaeger, Brice; Witters, Liesbeth; Vincent, Benjamin; Loo, Roger; Delabie, Annelies; Sioncke, Sonja; Caymax, Matty; Claeys, Cor (2012) -
Challenges for introducing Ge and III/V devices into CMOS technologies
Heyns, Marc; Alian, AliReza; Brammertz, Guy; Caymax, Matty; Eneman, Geert; Franco, Jacopo; Gencarelli, Federica; Groeseneken, Guido; Hellings, Geert; Hikavyy, Andriy; Houssa, Michel; Kaczer, Ben; Lin, Dennis; Loo, Roger; Merckling, Clement; Meuris, Marc; Mitard, Jerome; Nyns, Laura; Sioncke, Sonja; Vandervorst, Wilfried; Vincent, Benjamin; Waldron, Niamh; Witters, Liesbeth (2012) -
Challenges on surface conditioning in 3D device architectures: triple-gate FinFETs, gate-all-around lateral and vertical nanowire FETs
Veloso, Anabela; Paraschiv, Vasile; Vecchio, Emma; Devriendt, Katia; Li, Waikin; Simoen, Eddy; Chan, BT; Tao, Zheng; Rosseel, Erik; Loo, Roger; Milenin, Alexey; Kunert, Bernardette; Teugels, Lieve; Sebaai, Farid; Lorant, Christophe; van Dorp, Dennis; Altamirano Sanchez, Efrain; Brus, Stephan; Marien, Philippe; Fleischmann, Claudia; Melkonyan, Davit; Huynh Bao, Trong; Eneman, Geert; Hellings, Geert; Sibaja-Hernandez, Arturo; Matagne, Philippe; Waldron, Niamh; Mocuta, Dan; Collaert, Nadine (2017)