Publication:
Reinforcement Learning Hardware Accelerator using Cache-Based Memoization for Optimized Q-Table Selection
| dc.contributor.author | Mazaya, Muhammad Sulthan | |
| dc.contributor.author | Budi, Eko Mursito | |
| dc.contributor.author | Syafalni, Infall | |
| dc.contributor.author | Sutisna, Nana | |
| dc.contributor.author | Adiono, Trio | |
| dc.contributor.imecauthor | Syafalni, Infall | |
| dc.contributor.imecauthor | Sutisna, Nana | |
| dc.contributor.orcidimec | Syafalni, Infall::0000-0001-9922-5688 | |
| dc.contributor.orcidimec | Sutisna, Nana::0000-0002-8435-9242 | |
| dc.date.accessioned | 2024-08-12T08:18:39Z | |
| dc.date.available | 2024-07-28T19:32:52Z | |
| dc.date.available | 2024-08-12T08:18:39Z | |
| dc.date.issued | 2024 | |
| dc.description.wosFundingText | This work is supported by the 2024 Bandung Institute of Technology Research Program (Riset-ITB 2024). The authors also thank the School of Electrical Engineering and Informatics and the Faculty of Industrial Engineering, Bandung Institute of Technology for their support. M. S. Mazaya thanks IEEE Cool Chips 27 for the student travel grants. | |
| dc.identifier.doi | 10.1109/COOLCHIPS61292.2024.10531164 | |
| dc.identifier.eisbn | 979-8-3503-8414-7 | |
| dc.identifier.isbn | 979-8-3503-8415-4 | |
| dc.identifier.issn | 2473-4683 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/44210 | |
| dc.publisher | IEEE COMPUTER SOC | |
| dc.source.conference | Symposium in Low-Power and High-Speed Chips (COOL CHIPS) | |
| dc.source.conferencedate | APR 17-19, 2024 | |
| dc.source.conferencelocation | Tokyo | |
| dc.source.journal | N/A | |
| dc.source.numberofpages | 6 | |
| dc.title | Reinforcement Learning Hardware Accelerator using Cache-Based Memoization for Optimized Q-Table Selection | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
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