Publication:

Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipole

Date

2016
Proceedings Paper
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dc.contributor.authorFranco, Jacopo
dc.contributor.authorVais, Abhitosh
dc.contributor.authorSioncke, Sonja
dc.contributor.authorPutcha, Vamsi
dc.contributor.authorKaczer, Ben
dc.contributor.authorShie, Bo-Shiuan
dc.contributor.authorShi, Xiaoping
dc.contributor.authorReyhaneh, Mahlouji
dc.contributor.authorNyns, Laura
dc.contributor.authorZhou, Daisy
dc.contributor.authorWaldron, Niamh
dc.contributor.authorMaes, Jan
dc.contributor.authorXie, Qi
dc.contributor.authorGivens, M.
dc.contributor.authorTang, F.
dc.contributor.authorJiang, X.
dc.contributor.authorArimura, Hiroaki
dc.contributor.authorSchram, Tom
dc.contributor.authorRagnarsson, Lars-Ake
dc.contributor.authorSibaja-Hernandez, Arturo
dc.contributor.imecauthorFranco, Jacopo
dc.contributor.imecauthorVais, Abhitosh
dc.contributor.imecauthorPutcha, Vamsi
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorNyns, Laura
dc.contributor.imecauthorZhou, Daisy
dc.contributor.imecauthorWaldron, Niamh
dc.contributor.imecauthorMaes, Jan
dc.contributor.imecauthorXie, Qi
dc.contributor.imecauthorArimura, Hiroaki
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorRagnarsson, Lars-Ake
dc.contributor.imecauthorSibaja-Hernandez, Arturo
dc.contributor.imecauthorHellings, Geert
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.imecauthorHeyns, Marc
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.imecauthorLinten, Dimitri
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorThean, Aaron
dc.contributor.orcidimecFranco, Jacopo::0000-0002-7382-8605
dc.contributor.orcidimecVais, Abhitosh::0000-0002-0317-7720
dc.contributor.orcidimecPutcha, Vamsi::0000-0003-1907-5486
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.contributor.orcidimecNyns, Laura::0000-0001-8220-870X
dc.contributor.orcidimecSchram, Tom::0000-0003-1533-7055
dc.contributor.orcidimecRagnarsson, Lars-Ake::0000-0003-1057-8140
dc.contributor.orcidimecHellings, Geert::0000-0002-5376-2119
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.contributor.orcidimecGroeseneken, Guido::0000-0003-3763-2098
dc.contributor.orcidimecLinten, Dimitri::0000-0001-8434-1838
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.date.accessioned2021-10-23T10:53:14Z
dc.date.available2021-10-23T10:53:14Z
dc.date.embargo2016-09-16
dc.date.issued2016
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/26633
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=7573371
dc.source.beginpage42
dc.source.conferenceIEEE Symposium on VLSI Technology
dc.source.conferencedate13/06/2016
dc.source.conferencelocationHonolulu, HI USA
dc.source.endpage43
dc.title

Demonstration of an InGaAs gate stack with sufficient PBTI reliability by thermal budget optimization, nitridation, high-k material choice, and interface dipole

dc.typeProceedings paper
dspace.entity.typePublication
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