Publication:
Multi-Vt Gate Stack Technologies for Nanosheet and CFET Devices
| dc.contributor.author | Arimura, Hiroaki | |
| dc.contributor.author | Franco, Jacopo | |
| dc.contributor.author | Ragnarsson, Lars-Ake | |
| dc.contributor.author | Vandooren, Anne | |
| dc.contributor.author | Brus, Stephan | |
| dc.contributor.author | Maqsood, W. | |
| dc.contributor.author | Conard, Thierry | |
| dc.contributor.author | Verni, G. Alessio | |
| dc.contributor.author | Maes, J. W. | |
| dc.contributor.author | Kannan, B. | |
| dc.contributor.author | Givens, M. | |
| dc.contributor.author | Horiguchi, Naoto | |
| dc.contributor.imecauthor | Arimura, H. | |
| dc.contributor.imecauthor | Franco, J. | |
| dc.contributor.imecauthor | Ragnarsson, L-A | |
| dc.contributor.imecauthor | Vandooren, A. | |
| dc.contributor.imecauthor | Brus, S. | |
| dc.contributor.imecauthor | Maqsood, W. | |
| dc.contributor.imecauthor | Conard, T. | |
| dc.contributor.imecauthor | Horiguchi, N. | |
| dc.date.accessioned | 2024-10-27T16:52:59Z | |
| dc.date.available | 2024-10-27T16:52:59Z | |
| dc.date.issued | 2024 | |
| dc.identifier.doi | 10.1109/SNW63608.2024.10639201 | |
| dc.identifier.eisbn | 979-8-3503-9163-3 | |
| dc.identifier.isbn | 979-8-3503-9164-0 | |
| dc.identifier.issn | 2161-4636 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/44692 | |
| dc.publisher | IEEE | |
| dc.source.beginpage | 47 | |
| dc.source.conference | IEEE Silicon Nanoelectronics Workshop (SNW) / Symposium on VLSI Technology and Circuits | |
| dc.source.conferencedate | 2024-06-15 | |
| dc.source.conferencelocation | Honolulu | |
| dc.source.endpage | 48 | |
| dc.source.numberofpages | 2 | |
| dc.title | Multi-Vt Gate Stack Technologies for Nanosheet and CFET Devices | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
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