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Applying design-based metrology for calibrating an OPC model for FinFET pattering

Date

2005
Proceedings Paper
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dc.contributor.authorVandeweyer, Tom
dc.contributor.authorLorusso, Gian
dc.contributor.authorDelvaux, Christie
dc.contributor.authorDe Backer, Johan
dc.contributor.authorJandhyala, Radhika
dc.contributor.authorAzordegan, Amir
dc.contributor.authorAbott, Gordon
dc.contributor.authorKaliblotzky, Zeev
dc.contributor.authorErcken, Monique
dc.contributor.imecauthorVandeweyer, Tom
dc.contributor.imecauthorLorusso, Gian
dc.contributor.imecauthorDelvaux, Christie
dc.contributor.imecauthorDe Backer, Johan
dc.contributor.imecauthorErcken, Monique
dc.date.accessioned2021-10-16T06:37:16Z
dc.date.available2021-10-16T06:37:16Z
dc.date.issued2005
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/11474
dc.source.conferenceInterface
dc.source.conferencedate25/10/2005
dc.source.conferencelocationSan Diego, CA USA
dc.title

Applying design-based metrology for calibrating an OPC model for FinFET pattering

dc.typeProceedings paper
dspace.entity.typePublication
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