Publication:

Understanding the intrinsic reliability behavior of n-/p-Si and p-Ge nanowire FETs utilizing degradation maps

Date

2018
Proceedings Paper
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dc.contributor.authorVaisman Chasin, Adrian
dc.contributor.authorBury, Erik
dc.contributor.authorFranco, Jacopo
dc.contributor.authorKaczer, Ben
dc.contributor.authorVandemaele, Michiel
dc.contributor.authorArimura, Hiroaki
dc.contributor.authorCapogreco, Elena
dc.contributor.authorWitters, Liesbeth
dc.contributor.authorRitzenthaler, Romain
dc.contributor.authorMertens, Hans
dc.contributor.authorHoriguchi, Naoto
dc.contributor.authorLinten, Dimitri
dc.contributor.imecauthorVaisman Chasin, Adrian
dc.contributor.imecauthorBury, Erik
dc.contributor.imecauthorFranco, Jacopo
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorVandemaele, Michiel
dc.contributor.imecauthorArimura, Hiroaki
dc.contributor.imecauthorCapogreco, Elena
dc.contributor.imecauthorWitters, Liesbeth
dc.contributor.imecauthorRitzenthaler, Romain
dc.contributor.imecauthorMertens, Hans
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.imecauthorLinten, Dimitri
dc.contributor.orcidimecVaisman Chasin, Adrian::0000-0002-9940-0260
dc.contributor.orcidimecBury, Erik::0000-0002-5847-3949
dc.contributor.orcidimecFranco, Jacopo::0000-0002-7382-8605
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.contributor.orcidimecVandemaele, Michiel::0000-0003-0740-4115
dc.contributor.orcidimecRitzenthaler, Romain::0000-0002-8615-3272
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.contributor.orcidimecLinten, Dimitri::0000-0001-8434-1838
dc.date.accessioned2021-10-26T06:15:57Z
dc.date.available2021-10-26T06:15:57Z
dc.date.embargo9999-12-31
dc.date.issued2018
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/31999
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8614542
dc.source.beginpage783
dc.source.conferenceIEEE International Electron Devices Meeting - IEDM
dc.source.conferencedate1/12/2018
dc.source.conferencelocationSan Francisco, CA USA
dc.source.endpage786
dc.title

Understanding the intrinsic reliability behavior of n-/p-Si and p-Ge nanowire FETs utilizing degradation maps

dc.typeProceedings paper
dspace.entity.typePublication
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