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Conference contributions
FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic
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FPGA based real-time constrained time area optimized IIR design using digital-serial arithmetic
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Date
2002
Proceedings Paper
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Basic data
APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Vlaminck, R.
;
Pletinckx, J.
;
Verschuere, Stefaan
;
Bertrem, S.
;
Vandewege, Jan
;
Boets, P.
;
Vanuytsel, G.
;
Temmerman, S.
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1989
since deposited on 2021-10-14
1
last month
Acq. date: 2025-12-10
Citations
Metrics
Views
1989
since deposited on 2021-10-14
1
last month
Acq. date: 2025-12-10
Citations