Publication:

Line edge roughness (LER) correlation and dielectric reliability with spacer-defined double patterning (SDDP) at 20nm half pitch

Date

2011
Proceedings Paper
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dc.contributor.authorSiew, Yong Kong
dc.contributor.authorStucchi, Michele
dc.contributor.authorVersluijs, Janko
dc.contributor.authorRoussel, Philippe
dc.contributor.authorKunnen, Eddy
dc.contributor.authorPantouvaki, Marianna
dc.contributor.authorBeyer, Gerald
dc.contributor.authorTokei, Zsolt
dc.contributor.imecauthorSiew, Yong Kong
dc.contributor.imecauthorStucchi, Michele
dc.contributor.imecauthorVersluijs, Janko
dc.contributor.imecauthorRoussel, Philippe
dc.contributor.imecauthorPantouvaki, Marianna
dc.contributor.imecauthorBeyer, Gerald
dc.contributor.imecauthorTokei, Zsolt
dc.contributor.orcidimecRoussel, Philippe::0000-0002-0402-8225
dc.date.accessioned2021-10-19T18:47:39Z
dc.date.available2021-10-19T18:47:39Z
dc.date.issued2011
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/19777
dc.source.beginpage6.5
dc.source.conferenceIEEE International Interconnect Technology Conference and Materials for Advanced Metallization - IITC/MAM
dc.source.conferencedate8/05/2011
dc.source.conferencelocationDresden Germany
dc.title

Line edge roughness (LER) correlation and dielectric reliability with spacer-defined double patterning (SDDP) at 20nm half pitch

dc.typeProceedings paper
dspace.entity.typePublication
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