Impact of high-k gate dielectrics on decananometer double-gate MOSFETs: gate-fringing field and parasitic charge effects

dc.contributor.author	Munteanu, D.
dc.contributor.author	Autran, J.L.
dc.contributor.author	Bescond, M.
dc.contributor.author	Houssa, Michel
dc.contributor.imecauthor	Houssa, Michel
dc.contributor.orcidimec	Houssa, Michel::0000-0003-1844-3515
dc.date.accessioned	2021-10-15T15:01:06Z
dc.date.available	2021-10-15T15:01:06Z
dc.date.issued	2004
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/9331
dc.source.beginpage	39
dc.source.conference	Proceedings Ultimate Integration of Silicon (ULIS) Workshop
dc.source.conferencedate	11/03/2004
dc.source.conferencelocation	Leuven Belgium
dc.source.endpage	42
dc.title	Impact of high-k gate dielectrics on decananometer double-gate MOSFETs: gate-fringing field and parasitic charge effects
dc.type	Proceedings paper
dspace.entity.type	Publication
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