Publication:
A novel test and analysis scheme to elucidate tail bit characteristics in STT-MRAM arrays
| dc.contributor.author | Kim, Woojin | |
| dc.contributor.author | Pica, Valerio | |
| dc.contributor.author | Jossart, Nico | |
| dc.contributor.author | Yasin, Farrukh | |
| dc.contributor.author | Wostyn, Kurt | |
| dc.contributor.author | Couet, Sebastien | |
| dc.contributor.author | Rao, Siddharth | |
| dc.contributor.imecauthor | Kim, Woojin | |
| dc.contributor.imecauthor | Pica, Valerio | |
| dc.contributor.imecauthor | Jossart, Nico | |
| dc.contributor.imecauthor | Yasin, Farrukh | |
| dc.contributor.imecauthor | Wostyn, Kurt | |
| dc.contributor.imecauthor | Couet, Sebastien | |
| dc.contributor.imecauthor | Rao, Siddharth | |
| dc.contributor.orcidimec | Kim, Woojin::0000-0002-2755-6661 | |
| dc.contributor.orcidimec | Pica, Valerio::0009-0004-2468-4029 | |
| dc.contributor.orcidimec | Jossart, Nico::0009-0003-2798-8290 | |
| dc.contributor.orcidimec | Yasin, Farrukh::0000-0002-7295-0254 | |
| dc.contributor.orcidimec | Wostyn, Kurt::0000-0003-3995-0292 | |
| dc.contributor.orcidimec | Couet, Sebastien::0000-0001-6436-9593 | |
| dc.contributor.orcidimec | Rao, Siddharth::0000-0001-6161-3052 | |
| dc.date.accessioned | 2024-11-14T12:45:24Z | |
| dc.date.available | 2024-07-12T18:43:09Z | |
| dc.date.available | 2024-11-14T12:45:24Z | |
| dc.date.issued | 2024 | |
| dc.description.wosFundingText | This work is supported by IMEC's Industrial Affiliation Program on STT-MRAM devices. The authors would also like to acknowledge the support of imec's fab, line, MCA and hardware teams | |
| dc.identifier.doi | 10.1109/IMW59701.2024.10536950 | |
| dc.identifier.eisbn | 979-8-3503-0652-1 | |
| dc.identifier.issn | 2330-7978 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/44150 | |
| dc.publisher | IEEE | |
| dc.source.conference | International Memory Workshop (IMW) | |
| dc.source.conferencedate | MAY 12-15, 2024 | |
| dc.source.conferencelocation | Seoul | |
| dc.source.journal | N/A | |
| dc.source.numberofpages | 4 | |
| dc.title | A novel test and analysis scheme to elucidate tail bit characteristics in STT-MRAM arrays | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
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