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Methodology for extracting the characteristic capacitances of a power MOSFET transistor, using conventional on-wafer testing techniques

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dc.contributor.authorKerner, Christoph
dc.contributor.authorCiofi, Ivan
dc.contributor.authorChiarella, Thomas
dc.contributor.authorVan Huylenbroeck, Stefaan
dc.contributor.imecauthorKerner, Christoph
dc.contributor.imecauthorCiofi, Ivan
dc.contributor.imecauthorChiarella, Thomas
dc.contributor.imecauthorVan Huylenbroeck, Stefaan
dc.contributor.orcidimecCiofi, Ivan::0000-0003-1374-4116
dc.contributor.orcidimecChiarella, Thomas::0000-0002-6155-9030
dc.contributor.orcidimecVan Huylenbroeck, Stefaan::0000-0001-9978-3575
dc.date.accessioned2021-10-20T12:09:01Z
dc.date.available2021-10-20T12:09:01Z
dc.date.embargo9999-12-31
dc.date.issued2012
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/20914
dc.source.beginpage221
dc.source.conference42nd European Solid-State Device Research Conference - ESSDERC
dc.source.conferencedate17/09/2012
dc.source.conferencelocationBordeaux France
dc.source.endpage225
dc.title

Methodology for extracting the characteristic capacitances of a power MOSFET transistor, using conventional on-wafer testing techniques

dc.typeProceedings paper
dspace.entity.typePublication
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