Publication:
Gate-source-drain architecture impact on DC and performance of sub-100-nm elevated source/drain NMOS transistors
Date
| dc.contributor.author | Jeamsaksiri, Wutthinan | |
| dc.contributor.author | Jurczak, Gosia | |
| dc.contributor.author | Grau, Lluis | |
| dc.contributor.author | Linten, Dimitri | |
| dc.contributor.author | Augendre, Emmanuel | |
| dc.contributor.author | de Potter de ten Broeck, Muriel | |
| dc.contributor.author | Rooyackers, Rita | |
| dc.contributor.author | Wambacq, Piet | |
| dc.contributor.author | Badenes, Gonçal | |
| dc.contributor.imecauthor | Jurczak, Gosia | |
| dc.contributor.imecauthor | Linten, Dimitri | |
| dc.contributor.imecauthor | de Potter de ten Broeck, Muriel | |
| dc.contributor.imecauthor | Wambacq, Piet | |
| dc.contributor.orcidimec | Linten, Dimitri::0000-0001-8434-1838 | |
| dc.contributor.orcidimec | Wambacq, Piet::0000-0003-4388-7257 | |
| dc.date.accessioned | 2021-10-15T05:01:11Z | |
| dc.date.available | 2021-10-15T05:01:11Z | |
| dc.date.issued | 2003 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/7688 | |
| dc.source.beginpage | 610 | |
| dc.source.endpage | 617 | |
| dc.source.issue | 3 | |
| dc.source.journal | IEEE Trans. Electron Devices | |
| dc.source.volume | 50 | |
| dc.title | Gate-source-drain architecture impact on DC and performance of sub-100-nm elevated source/drain NMOS transistors | |
| dc.type | Journal article | |
| dspace.entity.type | Publication | |
| Files | ||
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