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Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETs

 
dc.contributor.authorCretu, Bogdan
dc.contributor.authorVeloso, Anabela
dc.contributor.authorSimoen, Eddy
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.orcidextSimoen, Eddy::0000-0002-5218-4046
dc.date.accessioned2023-05-16T09:38:45Z
dc.date.available2023-01-01T03:09:37Z
dc.date.available2023-05-16T09:38:45Z
dc.date.embargo9999-12-31
dc.date.issued2023
dc.identifier.doi10.1109/TED.2022.3225248
dc.identifier.issn0018-9383
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/40929
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage254
dc.source.endpage260
dc.source.issue1
dc.source.journalIEEE TRANSACTIONS ON ELECTRON DEVICES
dc.source.numberofpages7
dc.source.volume70
dc.subject.keywordsUNIVERSAL CORE MODEL
dc.subject.keywordsPARAMETER EXTRACTION
dc.subject.keywords1/F NOISE
dc.subject.keywordsTECHNOLOGY
dc.subject.keywordsMOSFETS
dc.subject.keywordsREGION
dc.title

Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETs

dc.typeJournal article
dspace.entity.typePublication
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