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Disrupting the DRAM roadmap with capacitor-less IGZO-DRAM technology

 
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0002-3947-1948
cris.virtualsource.departmentc49fd1e2-a117-4839-80dc-0e884525b195
cris.virtualsource.department51733ec3-79c7-4c34-9f77-3a0563c8f5a1
cris.virtualsource.orcidc49fd1e2-a117-4839-80dc-0e884525b195
cris.virtualsource.orcid51733ec3-79c7-4c34-9f77-3a0563c8f5a1
dc.contributor.authorBelmonte, Attilio
dc.contributor.authorKar, Gouri Sankar
dc.date.accessioned2026-06-04T09:04:56Z
dc.date.available2026-06-04T09:04:56Z
dc.date.createdwos2025-12-03
dc.date.issued2025
dc.description.abstractTraditional DRAM technology, with memory bit cells consisting of one silicon transistor and one capacitor, faces major scaling challenges. A new DRAM bit cell without a capacitor and with two thin-film transistors — each with an oxide semiconductor channel such as indium-gallium-zinc-oxide — shows promises for continuing the DRAM technology roadmap, clearing the way for high-density 3D DRAM.
dc.identifier.doi10.1038/s44287-025-00162-w
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/59553
dc.language.isoeng
dc.provenance.editstepusergreet.vanhoof@imec.be
dc.publisherSPRINGERNATURE
dc.source.beginpage220
dc.source.endpage221
dc.source.issue4
dc.source.journalNATURE REVIEWS ELECTRICAL ENGINEERING
dc.source.numberofpages2
dc.source.volume2
dc.title

Disrupting the DRAM roadmap with capacitor-less IGZO-DRAM technology

dc.typeEditorial material
dspace.entity.typePublication
imec.internal.crawledAt2026-04-07
imec.internal.sourcecrawler
imec.internal.wosCreatedAt2026-04-07
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