Extendable E2I-TEST for Chiplet-based Inter-die Interconnects

Abstract

Chiplet-based multi-die packages (a.k.a. 2.5D- and 3D-ICs) implement large amounts of inter-die interconnects with micro-bumps. To achieve uniform heights, these micro-bumps are typically placed in large rectangular or hexagonal arrays. These interconnects are prone to manufacturing defects. In this paper, we review E2I-TEST, an effective, efficient, and aliasing-free test generation method designed to detect short and open defects in die-to-die interconnects using only 16 test patterns, independent of the number of interconnects. The original E2I-TEST only considers 3D interconnects, such as micro-bumps and TSVs. It assumed that the two stacked dies share the same micro-bump map and have identical neighborhoods, where the interconnect neighborhood is defined by the physical adjacency of micro-bumps. Therefore, this paper proposes an enhancement to E2I-TEST that extends its applicability to more complex packaging configurations. This improved approach includes an automated generation flow based on E2I-TEST by accounting all physical adjacencies between interposer wires, TSVs, and micro-bump arrays. As a result, the extendable E2I-TEST significantly reduces the number of test patterns required compared to traditional interconnect test generation methods. In our experiments on a hypothetical 2.5D design, the proposed method achieved a 55% reduction in the number of test patterns compared to conventional approaches.