SiGe selective etching to enable bottom and middle dielectric isolations for advanced gate-all-around FET architecture

Kawarazaki, Hikaru; Nakano, Teppei; Ishizu, Takaaki; Tanaka, Takayoshi; Liu, Wen; Chen, Jason; Kawashima, Tomohiko; Wu, Aiping; Sebaai, Farid; Lai, Ju-Geng; Oniki, Yusuke; Altamirano Sanchez, Efrain

doi:10.4028/p-msgv7q

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SiGe selective etching to enable bottom and middle dielectric isolations for advanced gate-all-around FET architecture

Date

2023

Proceedings Paper

https://doi.org/10.4028/p-msgv7q

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Altamirano Sanchez, Efrain

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Solid State Phenomena; Vol. 346

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533 since deposited on 2023-09-21

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Acq. date: 2026-10-05

SiGe selective etching to enable bottom and middle dielectric isolations for advanced gate-all-around FET architecture

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