SiGe selective etching to enable bottom and middle dielectric isolations for advanced gate-all-around FET architecture

Kawarazaki, Hikaru; Nakano, Teppei; Ishizu, Takaaki; Tanaka, Takayoshi; Liu, Wen; Chen, Jason; Kawashima, Tomohiko; Wu, Aiping; Sebaai, Farid; Lai, Ju-Geng; Oniki, Yusuke; Altamirano Sanchez, Efrain

doi:10.4028/p-MsGv7Q

Publication:

SiGe selective etching to enable bottom and middle dielectric isolations for advanced gate-all-around FET architecture

Date

2023-08-14

Proceedings Paper

https://doi.org/10.4028/p-MsGv7Q

Simple item page Full metadata Statistics

Author(s)

;

;

;

;

;

;

;

;

;

;

;

Altamirano Sanchez, Efrain

Journal

Solid State Phenomena; Vol. 346

Statistics

486 since deposited on 2023-09-21

1last month

Acq. date: 2026-04-06

SiGe selective etching to enable bottom and middle dielectric isolations for advanced gate-all-around FET architecture

Date

Author(s)

Journal

Abstract

Description

Statistics

Views

Citations

Statistics

Views

Citations