Publication:

SiGe selective etching to enable bottom and middle dielectric isolations for advanced gate-all-around FET architecture

Date

2023-08-14
Proceedings Paper
https://doi.org/10.4028/p-MsGv7Q
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dc.contributor.authorKawarazaki, Hikaru
dc.contributor.authorNakano, Teppei
dc.contributor.authorIshizu, Takaaki
dc.contributor.authorTanaka, Takayoshi
dc.contributor.authorLiu, Wen
dc.contributor.authorChen, Jason
dc.contributor.authorKawashima, Tomohiko
dc.contributor.authorWu, Aiping
dc.contributor.authorSebaai, Farid
dc.contributor.authorLai, Ju-Geng
dc.contributor.authorOniki, Yusuke
dc.contributor.authorAltamirano Sanchez, Efrain
dc.contributor.imecauthorSebaai, Farid
dc.contributor.imecauthorAltamirano Sanchez, Efrain
dc.contributor.orcidimecSebaai, Farid::0009-0008-0186-6101
dc.contributor.orcidimecAltamirano Sanchez, Efrain::0000-0003-3235-6055
dc.date.accessioned2025-02-10T14:22:20Z
dc.date.available2023-09-21T09:33:53Z
dc.date.available2025-02-10T14:22:20Z
dc.date.issued2023-08-14
dc.identifier.doi10.4028/p-MsGv7Q
dc.identifier.issn1662-9779
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/42577
dc.publisherTrans Tech Publications
dc.source.beginpage23
dc.source.conferenceUCPSS - 16th International Symposium on Ultra Clean Processing of Semiconductor Surfaces
dc.source.conferencedate11-13 Sept 2023
dc.source.conferencelocationBrugge
dc.source.endpage27
dc.source.journalSolid State Phenomena; Vol. 346
dc.source.numberofpages6
dc.title

SiGe selective etching to enable bottom and middle dielectric isolations for advanced gate-all-around FET architecture

dc.typeProceedings paper
dspace.entity.typePublication
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