Publication:

Trap reduction and performances improvements study after high pressure anneal process on single crystal channel 3D NAND devices

Date

2018
Proceedings Paper
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dc.contributor.authorSubirats, Alexandre
dc.contributor.authorArreghini, Antonio
dc.contributor.authorDelhougne, Romain
dc.contributor.authorRosseel, Erik
dc.contributor.authorHikavyy, Andriy
dc.contributor.authorBreuil, Laurent
dc.contributor.authorVadakupudhu Palayam, Senthil
dc.contributor.authorVan den Bosch, Geert
dc.contributor.authorLinten, Dimitri
dc.contributor.authorFurnemont, Arnaud
dc.contributor.imecauthorArreghini, Antonio
dc.contributor.imecauthorDelhougne, Romain
dc.contributor.imecauthorRosseel, Erik
dc.contributor.imecauthorHikavyy, Andriy
dc.contributor.imecauthorBreuil, Laurent
dc.contributor.imecauthorVadakupudhu Palayam, Senthil
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.imecauthorLinten, Dimitri
dc.contributor.imecauthorFurnemont, Arnaud
dc.contributor.orcidimecArreghini, Antonio::0000-0002-7493-9681
dc.contributor.orcidimecHikavyy, Andriy::0000-0002-8201-075X
dc.contributor.orcidimecBreuil, Laurent::0000-0003-2869-1651
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.contributor.orcidimecLinten, Dimitri::0000-0001-8434-1838
dc.contributor.orcidimecFurnemont, Arnaud::0000-0002-6378-1030
dc.date.accessioned2021-10-26T04:57:24Z
dc.date.available2021-10-26T04:57:24Z
dc.date.embargo9999-12-31
dc.date.issued2018
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/31880
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8614667
dc.source.beginpage600
dc.source.conferenceIEEE International Electron Devices Meeting - IEDM
dc.source.conferencedate1/12/2018
dc.source.conferencelocationSan Francisco, CA USA
dc.source.endpage603
dc.title

Trap reduction and performances improvements study after high pressure anneal process on single crystal channel 3D NAND devices

dc.typeProceedings paper
dspace.entity.typePublication
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