Electrical performance and reliability aspects of strain engineered deep submicron CMOS technologies

dc.contributor.author	Claeys, Cor
dc.contributor.author	Eneman, Geert
dc.contributor.author	Bargallo Gonzalez, Mireia
dc.contributor.author	Put, Sofie
dc.contributor.author	Simoen, Eddy
dc.contributor.imecauthor	Eneman, Geert
dc.contributor.imecauthor	Simoen, Eddy
dc.contributor.orcidimec	Eneman, Geert::0000-0002-5849-3384
dc.contributor.orcidimec	Simoen, Eddy::0000-0002-5218-4046
dc.date.accessioned	2021-10-16T15:19:33Z
dc.date.available	2021-10-16T15:19:33Z
dc.date.embargo	9999-12-31
dc.date.issued	2007
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/11875
dc.source.beginpage	15
dc.source.conference	Int. Conf. on Semiconductor Technology for Ultra Large Scale Integrated Circuits and Thin Film Transistors (ULSIC vs. TFT)
dc.source.conferencedate	28/07/2007
dc.source.conferencelocation	Barga Italy
dc.source.endpage	22
dc.title	Electrical performance and reliability aspects of strain engineered deep submicron CMOS technologies
dc.type	Proceedings paper
dspace.entity.type	Publication
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