Publication:

Prediction of the influence of induced stresses in silicon on CMOS Performance in a Cu-through-via interconnect technology

Date

2007-04
Proceedings Paper
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dc.contributor.authorOkoro, Chukwudi
dc.contributor.authorGonzalez, Mario
dc.contributor.authorVandevelde, Bart
dc.contributor.authorSwinnen, Bart
dc.contributor.authorEneman, Geert
dc.contributor.authorVerheyen, Peter
dc.contributor.authorBeyne, Eric
dc.contributor.authorVandepitte, Dirk
dc.contributor.imecauthorGonzalez, Mario
dc.contributor.imecauthorVandevelde, Bart
dc.contributor.imecauthorSwinnen, Bart
dc.contributor.imecauthorEneman, Geert
dc.contributor.imecauthorVerheyen, Peter
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecVandevelde, Bart::0000-0002-6753-6438
dc.contributor.orcidimecEneman, Geert::0000-0002-5849-3384
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.accessioned2021-10-16T18:16:50Z
dc.date.available2021-10-16T18:16:50Z
dc.date.issued2007-04
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/12638
dc.source.beginpage190
dc.source.conferenceEuroSime: Thermal, Mechanical and Multiphysics Simulation and Experiments in Micro-Electronics and Micro-Systems
dc.source.conferencedate15/04/2007
dc.source.conferencelocationLondon UK
dc.source.endpage196
dc.title

Prediction of the influence of induced stresses in silicon on CMOS Performance in a Cu-through-via interconnect technology

dc.typeProceedings paper
dspace.entity.typePublication
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