Publication:

Achieving 1ppm write-error rate in SOT-MRAM with synthetic antiferromagnetic free layer

 
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.department#PLACEHOLDER_PARENT_METADATA_VALUE#
cris.virtual.orcid0000-0001-7763-7008
cris.virtual.orcid0000-0002-5285-5516
cris.virtual.orcid0000-0003-3995-0292
cris.virtual.orcid0000-0001-6924-4298
cris.virtual.orcid0000-0003-0793-0430
cris.virtual.orcid0000-0002-2499-4172
cris.virtual.orcid0000-0001-5557-8879
cris.virtual.orcid0000-0002-5515-458X
cris.virtual.orcid0000-0001-6436-9593
cris.virtualsource.department938ce4b7-2c24-4796-9159-ee25650f9130
cris.virtualsource.department4c4e9dca-64ea-4f5a-9201-ebbcaaf76a25
cris.virtualsource.departmentcb5e53b9-7316-4010-af61-65451216be66
cris.virtualsource.department0686975d-754d-4697-970f-2d06a24218bc
cris.virtualsource.department6c73784e-76fc-4087-92b1-1396677be2d2
cris.virtualsource.departmentb855f26b-2a8c-496b-ad29-bd9c793d67ba
cris.virtualsource.department3681846b-d800-4ad9-807a-98f249ce1266
cris.virtualsource.department0bc6023d-989f-4dd4-b789-79a2475c6784
cris.virtualsource.department27aacf70-ebb6-4934-9ebb-7db8dfb632c6
cris.virtualsource.orcid938ce4b7-2c24-4796-9159-ee25650f9130
cris.virtualsource.orcid4c4e9dca-64ea-4f5a-9201-ebbcaaf76a25
cris.virtualsource.orcidcb5e53b9-7316-4010-af61-65451216be66
cris.virtualsource.orcid0686975d-754d-4697-970f-2d06a24218bc
cris.virtualsource.orcid6c73784e-76fc-4087-92b1-1396677be2d2
cris.virtualsource.orcidb855f26b-2a8c-496b-ad29-bd9c793d67ba
cris.virtualsource.orcid3681846b-d800-4ad9-807a-98f249ce1266
cris.virtualsource.orcid0bc6023d-989f-4dd4-b789-79a2475c6784
cris.virtualsource.orcid27aacf70-ebb6-4934-9ebb-7db8dfb632c6
dc.contributor.authorNguyen, Van Dai
dc.contributor.authorTalmelli, Giacomo
dc.contributor.authorGama Monteiro Junior, Maxwel
dc.contributor.authorPalomino, A.
dc.contributor.authorKateel, Vaishnavi
dc.contributor.authorGiuliano, Domenico
dc.contributor.authorVan Beek, Simon
dc.contributor.authorVander Meeren, N.
dc.contributor.authorFranchina Vergel, Nathali
dc.contributor.authorWostyn, Kurt
dc.contributor.authorCouet, Sebastien
dc.date.accessioned2026-04-21T10:23:30Z
dc.date.available2026-04-21T10:23:30Z
dc.date.createdwos2026-03-18
dc.date.issued2024
dc.description.abstractWe demonstrate the functionality of a perpendicular spin-orbit torque (SOT)-MRAM with a synthetic anti ferromagnetic (SAF) free layer in the magnetic tunnel junction (MTJ) pillar. This novel stack design significantly reduces the write error rate (WER) to as low as 10‒6 while maintaining a thermal budget of 400°C, ensuring BEOL compatibility. Our micromagnetic simulations systematically guide the selection of key material parameters, ensuring reliable operation in real device demonstration. This correlation between simulation-guided material selection and experimental validation is crucial for advancing SOT-MRAM technology. Finally, our devices are fabricated on 300 mm wafers, enabling significant strides in technological integration.
dc.description.wosFundingTextThis work is supported by imec's industrial affiliation program on MRAM devices. We also acknowledge support from the ECSEL Joint Undertaking Program (grant No. 876925-project ANDANTE). The authors gratefully acknowledge the P-line for operational support. D. Giuliano gratefully acknowledges MO Flanders for a Strategic Basic Research PhD fellowship.
dc.identifier.doi10.1109/iedm50854.2024.10873509
dc.identifier.issn2380-9248
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/59146
dc.language.isoeng
dc.provenance.editstepusergreet.vanhoof@imec.be
dc.publisherIEEE
dc.source.conferenceIEEE International Electron Devices Meeting (IEDM)
dc.source.conferencedate2024-12-07
dc.source.conferencelocationSan Francisco
dc.source.journal2024 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, IEDM
dc.source.numberofpages4
dc.title

Achieving 1ppm write-error rate in SOT-MRAM with synthetic antiferromagnetic free layer

dc.typeProceedings paper
dspace.entity.typePublication
imec.internal.crawledAt2026-04-07
imec.internal.sourcecrawler
imec.internal.wosCreatedAt2026-04-07
Files
Publication available in collections: