Skip to content
Institutional repository
Communities & Collections
Browse all items
Scientific publications
Open knowledge
Log In
imec Publications
Conference contributions
Joint optimization of layout and litho for SRAM and Logic towards the 20 nm node, using 193i
Publication:
Joint optimization of layout and litho for SRAM and Logic towards the 20 nm node, using 193i
Copy permalink
Date
2011
Proceedings Paper
Simple item page
Full metadata
Statistics
Loading...
Loading...
Files
21342.pdf
1.55 MB
Basic data
APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
De Bisschop, Peter
;
Laenens, Bart
;
Iwase, Kazuya
;
Yao, Teruyoshi
;
Dusa, Mircea
;
Smayling, M.
Journal
Abstract
Description
Metrics
Views
1966
since deposited on 2021-10-19
1
last month
Acq. date: 2025-12-11
Citations
Metrics
Views
1966
since deposited on 2021-10-19
1
last month
Acq. date: 2025-12-11
Citations