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Electrical and DLTS Characterization of Gate Interfaces in GaN-based Trench-gate semi-vertical MOS devices

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dc.contributor.authorMarek, Juraj
dc.contributor.authorMikolášek, Miroslav
dc.contributor.authorDrobnŭ, Jakub
dc.contributor.authorKozarik, Jozef
dc.contributor.authorChvála, Aleš
dc.contributor.authorGeens, Karen
dc.contributor.authorBorga, Matteo
dc.contributor.authorLiang, Hu
dc.contributor.authorYou, Shuzhen
dc.contributor.authorDecoutere, Stefaan
dc.contributor.authorStuchlíková, Lubica
dc.contributor.imecauthorGeens, Karen
dc.contributor.imecauthorBorga, Matteo
dc.contributor.imecauthorLiang, Hu
dc.contributor.imecauthorYou, Shuzhen
dc.contributor.imecauthorDecoutere, Stefaan
dc.contributor.orcidimecGeens, Karen::0000-0003-1815-3972
dc.contributor.orcidimecBorga, Matteo::0000-0003-3087-6612
dc.contributor.orcidimecDecoutere, Stefaan::0000-0001-6632-6239
dc.date.accessioned2021-10-29T00:30:57Z
dc.date.available2021-10-29T00:30:57Z
dc.date.issued2020
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/35545
dc.source.beginpage57
dc.source.conferenceSolid State Surfaces and Interfaces 2020 (SSSI)
dc.source.conferencedate23/11/2020
dc.source.conferencelocationSmolenice Slovakia
dc.source.endpage58
dc.title

Electrical and DLTS Characterization of Gate Interfaces in GaN-based Trench-gate semi-vertical MOS devices

dc.typeProceedings paper
dspace.entity.typePublication
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