Publication:
Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies
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1935 since deposited on 2021-10-22
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Acq. date: 2026-01-26
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1935 since deposited on 2021-10-22
2last month
1last week
Acq. date: 2026-01-26
Citations