Junctionless versus inversion mode gate-all-around nanowire transistors from a low-frequency noise perspective

dc.contributor.author	Simoen, Eddy
dc.contributor.author	Veloso, Anabela
dc.contributor.author	Matagne, Philippe
dc.contributor.author	Collaert, Nadine
dc.contributor.author	Claeys, Cor
dc.contributor.imecauthor	Simoen, Eddy
dc.contributor.imecauthor	Veloso, Anabela
dc.contributor.imecauthor	Matagne, Philippe
dc.contributor.imecauthor	Collaert, Nadine
dc.contributor.orcidimec	Simoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimec	Collaert, Nadine::0000-0002-8062-3165
dc.date.accessioned	2021-10-26T03:58:43Z
dc.date.available	2021-10-26T03:58:43Z
dc.date.embargo	9999-12-31
dc.date.issued	2018
dc.identifier.issn	0018-9383
dc.identifier.uri	https://imec-publications.be/handle/20.500.12860/31790
dc.identifier.url	http://ieeexplore.ieee.org/document/8291052/
dc.source.beginpage	1487
dc.source.endpage	1492
dc.source.issue	4
dc.source.journal	IEEE Transactions on Electron Devices
dc.source.volume	65
dc.title	Junctionless versus inversion mode gate-all-around nanowire transistors from a low-frequency noise perspective
dc.type	Journal article
dspace.entity.type	Publication
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