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A study on power integrity in a 3D chip stack using dynamic power supply current emulation and power noise monitoring
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A study on power integrity in a 3D chip stack using dynamic power supply current emulation and power noise monitoring
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Date
2014
Proceedings Paper
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Araga, Yuuki
;
Miura, Ranto
;
Nagata, Makoto
;
Roda Neve, Cesar
;
De Vos, Joeri
;
Van der Plas, Geert
;
Beyne, Eric
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1863
since deposited on 2021-10-22
Acq. date: 2025-12-11
Citations
Metrics
Views
1863
since deposited on 2021-10-22
Acq. date: 2025-12-11
Citations