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Gate-all-around transistors based on vertically stacked Si nanowires
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Gate-all-around transistors based on vertically stacked Si nanowires
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Date
2017
Proceedings Paper
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Basic data
APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Mertens, Hans
;
Ritzenthaler, Romain
;
Hikavyy, Andriy
;
Kim, Min-Soo
;
Tao, Zheng
;
Wostyn, Kurt
;
Schram, Tom
;
Kunnen, Eddy
;
Ragnarsson, Lars-Ake
;
Dekkers, Harold
;
Hopf, Toby
;
Devriendt, Katia
;
Tsvetanova, Diana
;
Chew, Soon Aik
;
Kikuchi, Yoshiaki
;
Van Besien, Els
;
Rosseel, Erik
;
Mannaert, Geert
;
De Keersgieter, An
;
Vaisman Chasin, Adrian
;
Kubicek, Stefan
;
Dangol, Anish
;
Demuynck, Steven
;
Barla, Kathy
;
Mocuta, Dan
;
Horiguchi, Naoto
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1967
since deposited on 2021-10-24
Acq. date: 2025-12-11
Citations
Metrics
Views
1967
since deposited on 2021-10-24
Acq. date: 2025-12-11
Citations