Publication:

Modeling Gate Leakage Current for p-GaN Gate HEMTs With Engineered Doping Profile

 
dc.contributor.authorAlaei, Mojtaba
dc.contributor.authorBorga, Matteo
dc.contributor.authorFabris, Elena
dc.contributor.authorDecoutere, Stefaan
dc.contributor.authorLauwaert, Johan
dc.contributor.authorBakeroot, Benoit
dc.contributor.imecauthorAlaei, Mojtaba
dc.contributor.imecauthorBorga, Matteo
dc.contributor.imecauthorFabris, Elena
dc.contributor.imecauthorDecoutere, Stefaan
dc.contributor.imecauthorBakeroot, Benoit
dc.contributor.orcidimecAlaei, Mojtaba::0000-0002-5815-3654
dc.contributor.orcidimecBorga, Matteo::0000-0003-3087-6612
dc.contributor.orcidimecFabris, Elena::0000-0003-1345-5111
dc.contributor.orcidimecDecoutere, Stefaan::0000-0001-6632-6239
dc.contributor.orcidimecBakeroot, Benoit::0000-0003-4392-1777
dc.date.accessioned2024-08-22T11:56:56Z
dc.date.available2024-07-19T18:44:17Z
dc.date.available2024-08-22T11:56:56Z
dc.date.embargo2024-07-02
dc.date.issued2024
dc.description.wosFundingTextThis work was supported by the ASCENT+ Project funded by the European Union's Horizon 2020 Research and Innovation Program under Grant 871130.
dc.identifier.doi10.1109/TED.2024.3418292
dc.identifier.issn0018-9383
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/44176
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage4563
dc.source.endpage4569
dc.source.issue8
dc.source.journalIEEE TRANSACTIONS ON ELECTRON DEVICES
dc.source.numberofpages7
dc.source.volume71
dc.subject.keywordsTHRESHOLD VOLTAGE
dc.subject.keywordsDENSITY
dc.title

Modeling Gate Leakage Current for p-GaN Gate HEMTs With Engineered Doping Profile

dc.typeJournal article
dspace.entity.typePublication
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