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CMOS scaling beyond the 90 nm CMOS technology node: shallow junction and integration challenges

Date

2003
Proceedings Paper
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dc.contributor.authorDachs, Charles
dc.contributor.authorSurdeanu, Radu
dc.contributor.authorPawlak, Bartek
dc.contributor.authorDoornbos, Gerben
dc.contributor.authorDuffy, R.
dc.contributor.authorHeringa, Anco
dc.contributor.authorPonomarev, Youri
dc.contributor.authorVenezia, Vincent
dc.contributor.authorVan Dal, Mark
dc.contributor.authorStolk, P.
dc.contributor.authorLindsay, Richard
dc.contributor.authorHenson, Kirklen
dc.contributor.authorDieu, B.
dc.contributor.authorGeenen, Luc
dc.contributor.authorHoflijk, Ilse
dc.contributor.authorRichard, Olivier
dc.contributor.authorClarysse, Trudo
dc.contributor.authorBrijs, Bert
dc.contributor.authorVandervorst, Wilfried
dc.contributor.authorPagès, Xavier
dc.contributor.imecauthorPawlak, Bartek
dc.contributor.imecauthorDoornbos, Gerben
dc.contributor.imecauthorVan Dal, Mark
dc.contributor.imecauthorHoflijk, Ilse
dc.contributor.imecauthorRichard, Olivier
dc.contributor.imecauthorVandervorst, Wilfried
dc.contributor.orcidimecRichard, Olivier::0000-0002-3994-8021
dc.date.accessioned2021-10-15T04:14:43Z
dc.date.available2021-10-15T04:14:43Z
dc.date.issued2003
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/7374
dc.source.beginpage15
dc.source.conferenceUltra Shallow Junctions. 7th Int. Worksh. Fabrication, Characterization and Modeling of Ultra Shallow Doping Profiles in Semic.
dc.source.conferencedate27/04/2003
dc.source.conferencelocationSanta Cruz, CA USA
dc.source.endpage22
dc.title

CMOS scaling beyond the 90 nm CMOS technology node: shallow junction and integration challenges

dc.typeProceedings paper
dspace.entity.typePublication
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