Device process and architecture aware physical TCAD model for ultra-thin film a-IGZO transistors

Abstract

Performance of amorphous IGZO thin film transistors is strongly linked to their device architecture and processing. We identify the critical parameters determining device performance across bias ranges through experiments and TCAD simulations. Based on this, we present a process-aware TCAD model describing transfer characteristics of three device architectures. Insights from this modeling work are used to understand the impact of various process steps on the device operation and propose design guidelines for performance optimization.