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In-depth static and low frequency noise assessment of p-channel gate-all-around vertically stacked silicon nanosheets

 
dc.contributor.authorCretu, B.
dc.contributor.authorVeloso, Anabela
dc.contributor.authorSimoen, Eddy
dc.contributor.imecauthorVeloso, Anabela
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.date.accessioned2023-07-03T12:37:48Z
dc.date.available2023-06-11T19:49:45Z
dc.date.available2023-07-03T12:37:48Z
dc.date.issued2023
dc.identifier.doi10.1016/j.sse.2023.108591
dc.identifier.issn0038-1101
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/41711
dc.publisherPERGAMON-ELSEVIER SCIENCE LTD
dc.source.beginpageArt. 108591
dc.source.endpagena
dc.source.issueMarch
dc.source.journalSOLID-STATE ELECTRONICS
dc.source.numberofpages7
dc.source.volume201
dc.subject.keywordsPARAMETER EXTRACTION
dc.subject.keywordsELECTRICAL NOISE
dc.subject.keywords1/F NOISE
dc.subject.keywordsMOSFETS
dc.title

In-depth static and low frequency noise assessment of p-channel gate-all-around vertically stacked silicon nanosheets

dc.typeJournal article
dspace.entity.typePublication
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