ADVANCES IN ANALOGUE AND MIXED-SIGNAL INTEGRATED CIRCUITS FOR SPACE APPLICATIONS, AMICSA 2025
Abstract
The 65nm CMOS node is used for the development of DARE65T, an aerospace grade ASIC platform that can be used to design radiation-hardened-by-design ASICs with commercial foundry technology. The platform is composed of a range of IP libraries including standard cell, IO, SRAMs, as well as mixed signal IPs including PLL, current/voltage reference and ADC. All IPs are evaluated under irradiation by means of two different test vehicles, and a functional demonstrator ASIC is presented as a proof of platform readiness for flight model ASICs.
