Publication:
Evaluation of the DARE65T Platform: Technology Study, IP Library Development and Demonstrator ASIC Design
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.department | #PLACEHOLDER_PARENT_METADATA_VALUE# | |
| cris.virtual.orcid | 0000-0002-0388-6498 | |
| cris.virtual.orcid | 0000-0002-4017-7033 | |
| cris.virtual.orcid | 0000-0003-0912-7131 | |
| cris.virtualsource.department | c6a7c64f-cc6d-4073-a52e-4018ec595462 | |
| cris.virtualsource.department | 1e8df551-8fe0-41a7-88a2-dce01921eb1f | |
| cris.virtualsource.department | 450b836f-09a6-4577-8139-9e6237b08b4b | |
| cris.virtualsource.orcid | c6a7c64f-cc6d-4073-a52e-4018ec595462 | |
| cris.virtualsource.orcid | 1e8df551-8fe0-41a7-88a2-dce01921eb1f | |
| cris.virtualsource.orcid | 450b836f-09a6-4577-8139-9e6237b08b4b | |
| dc.contributor.author | van de Burgwal, Marcel | |
| dc.contributor.author | Gorbunov, Maxim | |
| dc.contributor.author | Berti, Laurent | |
| dc.contributor.author | Tambara, Lucas | |
| dc.date.accessioned | 2026-09-02T10:22:44Z | |
| dc.date.available | 2026-09-02T10:22:44Z | |
| dc.date.createdwos | 2026 | |
| dc.date.issued | 2026 | |
| dc.description.abstract | The 65nm CMOS node is used for the development of DARE65T, an aerospace grade ASIC platform that can be used to design radiation-hardened-by-design ASICs with commercial foundry technology. The platform is composed of a range of IP libraries including standard cell, IO, SRAMs, as well as mixed signal IPs including PLL, current/voltage reference and ADC. All IPs are evaluated under irradiation by means of two different test vehicles, and a functional demonstrator ASIC is presented as a proof of platform readiness for flight model ASICs. | |
| dc.description.wosFundingText | This work is a part of the "DARE65 -Implementation, Evaluation, and Release of a Radiation Hardened Mixed-Signal Cell Library in a 65nm CMOS Technology" project, ESA Contract No 4000117214/16/NL/LF. The authors are grateful for the support from BELSPO (Belgian Science Policy Office), Alessandra Costantino and Florian Krimmel (ESTEC TEC-EDR) for SEE sample preparation and technical project officer Boris Glass for fruitful discussions. | |
| dc.identifier.doi | 10.1007/978-3-032-14405-8_15 | |
| dc.identifier.isbn | 978-3-032-14407-2 | |
| dc.identifier.isbn | 978-3-032-14404-1 | |
| dc.identifier.issn | 1876-1100 | |
| dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/60190 | |
| dc.language.iso | eng | |
| dc.provenance.editstepuser | greet.vanhoof@imec.be | |
| dc.publisher | SPRINGER INTERNATIONAL PUBLISHING AG | |
| dc.source.beginpage | 130 | |
| dc.source.conference | Advances in Analogue and Mixed-Signal Integrated Circuits for Space Applications, AMICSA | |
| dc.source.conferencedate | 2025-06-16 | |
| dc.source.conferencelocation | Lisbon | |
| dc.source.endpage | 142 | |
| dc.source.journal | ADVANCES IN ANALOGUE AND MIXED-SIGNAL INTEGRATED CIRCUITS FOR SPACE APPLICATIONS, AMICSA 2025 | |
| dc.source.numberofpages | 13 | |
| dc.title | Evaluation of the DARE65T Platform: Technology Study, IP Library Development and Demonstrator ASIC Design | |
| dc.type | Proceedings paper | |
| dspace.entity.type | Publication | |
| imec.internal.crawledAt | 2026-07-14 | |
| imec.internal.source | crawler | |
| imec.internal.wosCreatedAt | 2026-07-14 | |
| Files | ||
| Publication available in collections: |