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The influence of the epitaxial growth process parameters on layer characteristics and device performance in Si-passivated Ge pMOSFETs

Date

2009-05
Proceedings Paper
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dc.contributor.authorCaymax, Matty
dc.contributor.authorLeys, Frederik
dc.contributor.authorMitard, Jerome
dc.contributor.authorMartens, Koen
dc.contributor.authorYang, Lijung
dc.contributor.authorPourtois, Geoffrey
dc.contributor.authorVandervorst, Wilfried
dc.contributor.authorMeuris, Marc
dc.contributor.authorLoo, Roger
dc.contributor.imecauthorCaymax, Matty
dc.contributor.imecauthorMitard, Jerome
dc.contributor.imecauthorMartens, Koen
dc.contributor.imecauthorPourtois, Geoffrey
dc.contributor.imecauthorVandervorst, Wilfried
dc.contributor.imecauthorMeuris, Marc
dc.contributor.imecauthorLoo, Roger
dc.contributor.orcidimecMitard, Jerome::0000-0002-7422-079X
dc.contributor.orcidimecMartens, Koen::0000-0001-7135-5536
dc.contributor.orcidimecPourtois, Geoffrey::0000-0003-2597-8534
dc.contributor.orcidimecMeuris, Marc::0000-0002-9580-6810
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.date.accessioned2021-10-17T21:32:05Z
dc.date.available2021-10-17T21:32:05Z
dc.date.embargo9999-12-31
dc.date.issued2009-05
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15072
dc.source.beginpage183
dc.source.conferenceAdvanced Gate Stack, Source/Drain, and Channel Engineering for Si-based CMOS. 5: New Materials, Processing, and Equipment
dc.source.conferencedate24/05/2009
dc.source.conferencelocationSan Francisco, CA USA
dc.source.endpage194
dc.title

The influence of the epitaxial growth process parameters on layer characteristics and device performance in Si-passivated Ge pMOSFETs

dc.typeProceedings paper
dspace.entity.typePublication
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