Publication:

Vertical localization of trapped holes in SiON pMOSFETs after positive and negative gate stress

Date

2010
Proceedings Paper
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dc.contributor.authorToledano Luque, Maria
dc.contributor.authorKaczer, Ben
dc.contributor.authorRoussel, Philippe
dc.contributor.authorDegraeve, Robin
dc.contributor.authorFranco, Jacopo
dc.contributor.authorKauerauf, Thomas
dc.contributor.authorGrasser, Tibor
dc.contributor.authorGroeseneken, Guido
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorRoussel, Philippe
dc.contributor.imecauthorDegraeve, Robin
dc.contributor.imecauthorFranco, Jacopo
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.contributor.orcidimecRoussel, Philippe::0000-0002-0402-8225
dc.contributor.orcidimecFranco, Jacopo::0000-0002-7382-8605
dc.date.accessioned2021-10-18T22:23:35Z
dc.date.available2021-10-18T22:23:35Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18093
dc.source.conference41st IEEE Semiconductor Interface Specialists Conference
dc.source.conferencedate2/12/2010
dc.source.conferencelocationSan Diego, CA USA
dc.title

Vertical localization of trapped holes in SiON pMOSFETs after positive and negative gate stress

dc.typeProceedings paper
dspace.entity.typePublication
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