Publication:

A Duty-Cycle Switching 30-Gb/s Burst-Mode CDR With 1.6-ns Locking Time in 28-nm CMOS

Date

2025
Journal article
https://doi.org/10.1109/JSSC.2025.3556524
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dc.contributor.authorWang, Xin
dc.contributor.authorVandierendonck, Achim
dc.contributor.authorGovaerts, Bruno
dc.contributor.authorPannier, Tinus
dc.contributor.authorGeeroms, Warre
dc.contributor.authorMeysmans, Caro
dc.contributor.authorBauwelinck, Johan
dc.contributor.authorTorfs, Guy
dc.contributor.imecauthorWang, Xin
dc.contributor.imecauthorVandierendonck, Achim
dc.contributor.imecauthorGovaerts, Bruno
dc.contributor.imecauthorPannier, Tinus
dc.contributor.imecauthorGeeroms, Warre
dc.contributor.imecauthorMeysmans, Caro
dc.contributor.imecauthorBauwelinck, Johan
dc.contributor.imecauthorTorfs, Guy
dc.contributor.orcidimecWang, Xin::0000-0002-1727-0686
dc.contributor.orcidimecVandierendonck, Achim::0000-0003-4299-0068
dc.contributor.orcidimecGovaerts, Bruno::0009-0001-3485-5635
dc.contributor.orcidimecPannier, Tinus::0000-0003-2225-0505
dc.contributor.orcidimecGeeroms, Warre::0000-0002-2904-1987
dc.contributor.orcidimecMeysmans, Caro::0000-0002-3717-8107
dc.contributor.orcidimecBauwelinck, Johan::0000-0001-5254-2408
dc.contributor.orcidimecTorfs, Guy::0000-0003-1817-5370
dc.date.accessioned2025-04-30T06:36:09Z
dc.date.available2025-04-30T04:58:50Z
dc.date.available2025-04-30T06:36:09Z
dc.date.issued2025
dc.description.wosFundingTextThis work was supported in part by the Special Research Fund (BOF) of Ghent University under Grant GOA 01G01421, and in part by the Research Foundation Flanders (FWO) under Grant 3G035722.
dc.identifier.doi10.1109/JSSC.2025.3556524
dc.identifier.issn0018-9200
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/45571
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage1
dc.source.endpage13
dc.source.issue/
dc.source.journalIEEE JOURNAL OF SOLID-STATE CIRCUITS
dc.source.numberofpages13
dc.source.volume/
dc.subject.keywordsDFE RECEIVER
dc.subject.keywordsCLOCK
dc.title

A Duty-Cycle Switching 30-Gb/s Burst-Mode CDR With 1.6-ns Locking Time in 28-nm CMOS

dc.typeJournal article
dspace.entity.typePublication
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