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NPN SiGe Hetero Junction Transistor Latch-Up Memory Selector
Publication:
NPN SiGe Hetero Junction Transistor Latch-Up Memory Selector
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Date
2023-02-03
Journal article
https://doi.org/10.1109/LED.2023.3242302
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Hiblot, Gaspard
;
Ravsher, Taras
;
Loo, Roger
;
Yengula Venkata Ramana, Bhuvaneshwari
;
Canvel, Yann
;
Franchina Vergel, Nathali
;
Fantini, Andrea
;
Houshmand Sharifi, Shamin
;
Bazzazian, Nina
;
Ayyad, Mustafa
;
Merkulov, Alex
;
Kar, Gouri Sankar
;
Couet, Sebastien
Journal
IEEE ELECTRON DEVICE LETTERS
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Downloads
309
since deposited on 2023-04-27
47
last month
12
last week
Acq. date: 2025-12-17
Views
892
since deposited on 2023-04-27
3
last month
1
last week
Acq. date: 2025-12-17
Citations