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Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes

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dc.contributor.authorVinicius de Oliveira, Alberto
dc.contributor.authorSimoen, Eddy
dc.contributor.authorGhedini der Agopian, Paula
dc.contributor.authorMartino, Joao Antonio
dc.contributor.authorWitters, Liesbeth
dc.contributor.authorCollaert, Nadine
dc.contributor.authorThean, Aaron
dc.contributor.authorClaeys, Cor
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorWitters, Liesbeth
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorThean, Aaron
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.date.accessioned2021-10-23T16:52:43Z
dc.date.available2021-10-23T16:52:43Z
dc.date.issued2016
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/27552
dc.identifier.urlhttps://ieeexplore.ieee.org/document/7804384
dc.source.beginpage1
dc.source.conference2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
dc.source.conferencedate10/10/2016
dc.source.conferencelocationSan Francisco, CA USA
dc.source.endpage3
dc.title

Impact of the low temperature operation on long channel strained Ge pFinFETs fabricated with STI first and last processes

dc.typeProceedings paper
dspace.entity.typePublication
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