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Fast and accurate modeling of large TSV arrays in 3D-ICs using a 3D circuit model validated against full-wave FEM simulations and RF measurements

Date

2016
Proceedings Paper
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dc.contributor.authorRack, Martin
dc.contributor.authorRaskin, J.P.
dc.contributor.authorSun, Xiao
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorAbsil, Philippe
dc.contributor.authorBeyne, Eric
dc.contributor.imecauthorSun, Xiao
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorAbsil, Philippe
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.date.accessioned2021-10-23T13:56:06Z
dc.date.available2021-10-23T13:56:06Z
dc.date.embargo9999-12-31
dc.date.issued2016
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/27176
dc.identifier.urlhttp://ieeexplore.ieee.org/document/7545543/?arnumber=7545543
dc.source.beginpage966
dc.source.conferenceIEEE 66th Electronic Components and Technology Conference - ECTC
dc.source.conferencedate31/05/2015
dc.source.conferencelocationLas Vegas, NV USA
dc.source.endpage971
dc.title

Fast and accurate modeling of large TSV arrays in 3D-ICs using a 3D circuit model validated against full-wave FEM simulations and RF measurements

dc.typeProceedings paper
dspace.entity.typePublication
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