Publication:

CFET SRAM With Double-Sided Interconnect Design and DTCO Benchmark

Date

2023
Journal article
https://doi.org/10.1109/TED.2023.3305322
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dc.contributor.authorLiu, Hsiao-Hsuan
dc.contributor.authorSchuddinck, Pieter
dc.contributor.authorPei, Zhenlin
dc.contributor.authorVerschueren, Lynn
dc.contributor.authorMertens, Hans
dc.contributor.authorSalahuddin, Shairfe Muhammad
dc.contributor.authorHiblot, Gaspard
dc.contributor.authorXiang, Yang
dc.contributor.authorChan, Boon Teik
dc.contributor.authorSubramanian, Sujith
dc.contributor.authorWeckx, Pieter
dc.contributor.authorHellings, Geert
dc.contributor.authorGarcia Bardon, Marie
dc.contributor.authorRyckaert, Julien
dc.contributor.authorPan, Chenyun
dc.contributor.authorCatthoor, Francky
dc.contributor.imecauthorLiu, Hsiao-Hsuan
dc.contributor.imecauthorSchuddinck, Pieter
dc.contributor.imecauthorVerschueren, Lynn
dc.contributor.imecauthorMertens, Hans
dc.contributor.imecauthorSalahuddin, Shairfe M.
dc.contributor.imecauthorHiblot, Gaspard
dc.contributor.imecauthorXiang, Yang
dc.contributor.imecauthorChan, Boon Teik
dc.contributor.imecauthorSubramanian, Sujith
dc.contributor.imecauthorWeckx, Pieter
dc.contributor.imecauthorHellings, Geert
dc.contributor.imecauthorGarcia Bardon, Marie
dc.contributor.imecauthorRyckaert, Julien
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecSchuddinck, Pieter::0000-0003-1893-3135
dc.contributor.orcidimecVerschueren, Lynn::0000-0002-2941-769X
dc.contributor.orcidimecHiblot, Gaspard::0000-0002-3869-965X
dc.contributor.orcidimecXiang, Yang::0000-0003-0091-6935
dc.contributor.orcidimecSubramanian, Sujith::0000-0001-8938-9750
dc.contributor.orcidimecHellings, Geert::0000-0002-5376-2119
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.contributor.orcidimecMertens, Hans::0000-0002-3392-6892
dc.contributor.orcidimecGarcia Bardon, Marie::0000-0001-5772-5406
dc.date.accessioned2023-11-17T11:13:09Z
dc.date.available2023-09-19T17:50:47Z
dc.date.available2023-11-17T11:13:09Z
dc.date.issued2023
dc.identifier.doi10.1109/TED.2023.3305322
dc.identifier.issn0018-9383
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/42568
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
dc.source.beginpage5099
dc.source.endpage5106
dc.source.issue10
dc.source.journalIEEE TRANSACTIONS ON ELECTRON DEVICES
dc.source.numberofpages8
dc.source.volume70
dc.title

CFET SRAM With Double-Sided Interconnect Design and DTCO Benchmark

dc.typeJournal article
dspace.entity.typePublication
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