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A 12mW 10GHz FMCW PLL based on an integrating DAC with 90kHz rms frequency error for 23MHz/µs slope and 1.2GHz chirp bandwidth

Date

2020
Proceedings Paper
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dc.contributor.authorRenukaswamy, Pratap
dc.contributor.authorMarkulic, Nereo
dc.contributor.authorPark, Sehoon
dc.contributor.authorKankuppe Raghavendra Swamy, Anirudh Praveen
dc.contributor.authorWambacq, Piet
dc.contributor.authorCraninckx, Jan
dc.contributor.imecauthorRenukaswamy, Pratap
dc.contributor.imecauthorMarkulic, Nereo
dc.contributor.imecauthorPark, Sehoon
dc.contributor.imecauthorKankuppe Raghavendra Swamy, Anirudh Praveen
dc.contributor.imecauthorWambacq, Piet
dc.contributor.imecauthorCraninckx, Jan
dc.contributor.orcidimecRenukaswamy, Pratap::0000-0003-4148-7188
dc.contributor.orcidimecMarkulic, Nereo::0000-0001-6691-4647
dc.contributor.orcidimecKankuppe Raghavendra Swamy, Anirudh Praveen::0000-0002-0114-1193
dc.contributor.orcidimecWambacq, Piet::0000-0003-4388-7257
dc.contributor.orcidimecCraninckx, Jan::0000-0002-3980-0203
dc.date.accessioned2021-10-29T02:59:12Z
dc.date.available2021-10-29T02:59:12Z
dc.date.issued2020
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/35827
dc.identifier.urlhttps://ieeexplore.ieee.org/document/9063080
dc.source.conference2020 IEEE International Solid- State Circuits Conference - (ISSCC)
dc.source.conferencedate16/02/2020
dc.source.conferencelocationSan Francisco, CA USA
dc.title

A 12mW 10GHz FMCW PLL based on an integrating DAC with 90kHz rms frequency error for 23MHz/µs slope and 1.2GHz chirp bandwidth

dc.typeProceedings paper
dspace.entity.typePublication
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