Publication:

Vertical III-V gate-all-around nanowire MOSFETs: Process integration and contact resistance study

Date

2020-04
Dissertation
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dc.contributor.authorRamesh, Siva
dc.contributor.imecauthorRamesh, Siva
dc.contributor.orcidimecRamesh, Siva::0000-0002-8473-7258
dc.contributor.thesisadvisorDe Meyer, K.
dc.contributor.thesisadvisorCollaert, Nadine
dc.date.accessioned2021-10-29T02:43:53Z
dc.date.available2021-10-29T02:43:53Z
dc.date.embargo9999-12-31
dc.date.issued2020-04
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/35800
dc.title

Vertical III-V gate-all-around nanowire MOSFETs: Process integration and contact resistance study

dc.typePHD thesis
dspace.entity.typePublication
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