Publication:

Si/SiGe superlattice I/O finFETs in a vertically-stacked gate-all-around horizontal nanowire technology

Date

2018
Proceedings Paper
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dc.contributor.authorHellings, Geert
dc.contributor.authorMertens, Hans
dc.contributor.authorSubirats, Alexandre
dc.contributor.authorSimoen, Eddy
dc.contributor.authorSchram, Tom
dc.contributor.authorRagnarsson, Lars-Ake
dc.contributor.authorSimicic, Marko
dc.contributor.authorChen, Shih-Hung
dc.contributor.authorParvais, Bertrand
dc.contributor.authorBoudier, Dimitri
dc.contributor.authorCretu, Bogdan
dc.contributor.authorMachillot, Jerome
dc.contributor.authorPena, Vanessa
dc.contributor.authorSun, S.
dc.contributor.authorYoshida, N.
dc.contributor.authorKim, N.
dc.contributor.authorMocuta, Anda
dc.contributor.authorLinten, Dimitri
dc.contributor.authorHoriguchi, Naoto
dc.contributor.imecauthorHellings, Geert
dc.contributor.imecauthorMertens, Hans
dc.contributor.imecauthorSimoen, Eddy
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorRagnarsson, Lars-Ake
dc.contributor.imecauthorSimicic, Marko
dc.contributor.imecauthorChen, Shih-Hung
dc.contributor.imecauthorParvais, Bertrand
dc.contributor.imecauthorMachillot, Jerome
dc.contributor.imecauthorPena, Vanessa
dc.contributor.imecauthorLinten, Dimitri
dc.contributor.imecauthorHoriguchi, Naoto
dc.contributor.orcidimecHellings, Geert::0000-0002-5376-2119
dc.contributor.orcidimecSimoen, Eddy::0000-0002-5218-4046
dc.contributor.orcidimecSchram, Tom::0000-0003-1533-7055
dc.contributor.orcidimecRagnarsson, Lars-Ake::0000-0003-1057-8140
dc.contributor.orcidimecSimicic, Marko::0000-0002-3623-1842
dc.contributor.orcidimecParvais, Bertrand::0000-0003-0769-7069
dc.contributor.orcidimecLinten, Dimitri::0000-0001-8434-1838
dc.contributor.orcidimecHoriguchi, Naoto::0000-0001-5490-0416
dc.date.accessioned2021-10-25T19:41:37Z
dc.date.available2021-10-25T19:41:37Z
dc.date.embargo9999-12-31
dc.date.issued2018
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/30871
dc.identifier.urlhttps://ieeexplore.ieee.org/document/8510654
dc.source.beginpage85
dc.source.conferenceIEEE Symposium on VLSI Technology
dc.source.conferencedate14/06/2018
dc.source.conferencelocationHonolulu, HI USA
dc.source.endpage86
dc.title

Si/SiGe superlattice I/O finFETs in a vertically-stacked gate-all-around horizontal nanowire technology

dc.typeProceedings paper
dspace.entity.typePublication
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