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Two-dimensional carrier mapping at the nanometer-scale on 32nm node targeted p-MOSFETs using high vacuum scanning spreading resistance microscopy

Date

2011
Proceedings Paper
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dc.contributor.authorEyben, Pierre
dc.contributor.authorClarysse, Trudo
dc.contributor.authorMody, Jay
dc.contributor.authorNazir, Aftab
dc.contributor.authorSchulze, Andreas
dc.contributor.authorHantschel, Thomas
dc.contributor.authorVandervorst, Wilfried
dc.contributor.imecauthorEyben, Pierre
dc.contributor.imecauthorNazir, Aftab
dc.contributor.imecauthorHantschel, Thomas
dc.contributor.imecauthorVandervorst, Wilfried
dc.contributor.orcidimecHantschel, Thomas::0000-0001-9476-4084
dc.date.accessioned2021-10-19T13:27:38Z
dc.date.available2021-10-19T13:27:38Z
dc.date.embargo9999-12-31
dc.date.issued2011
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18891
dc.source.conferenceInternational Conference on Ultimate Integration on Silicon - ULIS
dc.source.conferencedate14/03/2011
dc.source.conferencelocationCork Ireland
dc.title

Two-dimensional carrier mapping at the nanometer-scale on 32nm node targeted p-MOSFETs using high vacuum scanning spreading resistance microscopy

dc.typeProceedings paper
dspace.entity.typePublication
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