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Technology assessment for the implementation of magnetoresistive elements with semiconductor components in magnetic random access memory (MRAM) architectures

Date

1999
Journal article
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dc.contributor.authorBoeve, Hans
dc.contributor.authorBruynseraede, Christophe
dc.contributor.authorDas, J.
dc.contributor.authorDessein, Kristof
dc.contributor.authorBorghs, Gustaaf
dc.contributor.authorDe Boeck, Jo
dc.contributor.authorSousa, R. C.
dc.contributor.authorMelo, Luis
dc.contributor.authorFreitas, P. P.
dc.contributor.imecauthorBorghs, Gustaaf
dc.contributor.imecauthorDe Boeck, Jo
dc.date.accessioned2021-10-06T10:43:51Z
dc.date.available2021-10-06T10:43:51Z
dc.date.issued1999
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/3248
dc.source.beginpage2820
dc.source.endpage2825
dc.source.issue5
dc.source.journalIEEE Trans. Magnetics
dc.source.volume35
dc.title

Technology assessment for the implementation of magnetoresistive elements with semiconductor components in magnetic random access memory (MRAM) architectures

dc.typeJournal article
dspace.entity.typePublication
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