Publication:

Memory node and oxide-nitride-oxide gate stack patterning for a bi-layer poly-silicon channel

Date

2011
Proceedings Paper
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dc.contributor.authorParaschiv, Vasile
dc.contributor.authorVecchio, Emma
dc.contributor.authorMilenin, Alexey
dc.contributor.authorKar, Gouri Sankar
dc.contributor.authorDemand, Marc
dc.contributor.authorCoenegrachts, Bart
dc.contributor.authorVertommen, Johan
dc.contributor.authorBoullart, Werner
dc.contributor.imecauthorParaschiv, Vasile
dc.contributor.imecauthorVecchio, Emma
dc.contributor.imecauthorMilenin, Alexey
dc.contributor.imecauthorKar, Gouri Sankar
dc.contributor.imecauthorDemand, Marc
dc.contributor.imecauthorCoenegrachts, Bart
dc.contributor.imecauthorBoullart, Werner
dc.contributor.orcidimecMilenin, Alexey::0000-0003-0747-0462
dc.contributor.orcidimecBoullart, Werner::0000-0001-7614-2097
dc.date.accessioned2021-10-19T17:05:40Z
dc.date.available2021-10-19T17:05:40Z
dc.date.issued2011
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/19539
dc.source.conference33rd International Symposium on Dry Process - DPS
dc.source.conferencedate10/11/2011
dc.source.conferencelocationKyoto Japan
dc.title

Memory node and oxide-nitride-oxide gate stack patterning for a bi-layer poly-silicon channel

dc.typeProceedings paper
dspace.entity.typePublication
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